UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 691

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UPD78F0838

Manufacturer Part Number
UPD78F0838
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
Symbol
Address: FF5BH
LCDM
(2)
Other than above
Cautions 1. Bits 1, 3 to 5 must be set to 0.
LCD display mode register (LCDM)
LCDM specifies whether to enable display operation.
pin/common pin output, gate booster circuit control, and the display mode.
LCDM is set using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets LCDM to 00H.
Note When LCD display is not to be performed or not required, power consumption can be reduced by using
LCDON
LCDON
SCOC
LCDM2
<7>
0
1
0
1
0
0
1
the following settings.
<1> Set SCOC (bit 6 of the LCD display mode register (LCDM)) to 0.
<2> Set MDSET0 and MDSET1 (bits 4 and 5 of the LCD mode register (LCDMD)) to 0.
After reset:
2. When displaying in a mode with a large number of COMs, such as 4 COM, V
Display off (all segment outputs are deselected.)
Display on
Output ground level to segment/common pin
Output deselect level to segment pin and LCD waveform to common pin
(The current flowing to the internal resistors can be reduced.)
be able to obtain sufficient contrast under the low-voltage conditions, depending on the
panel characteristics. Use the LCD controller/driver after having performed thorough
LCD display evaluation and confirmed that there are no problems regarding the display
quality.
SCOC
LCDM0
<6>
0
1
0
00H
Figure 17-3. Format of LCD Display Mode Register
R/W
4
3
Static
Setting prohibited
CHAPTER 17 LCD CONTROLLER/DRIVER
5
0
Preliminary User’s Manual U19748EJ1V0UD
Number of time slices
Segment pin/common pin output control
4
0
LCD controller/driver display mode selection
LCD display enable/disable
Resistance division method
3
0
It also specifies whether to enable segment
1/3
1/3
LCDM2
2
Note
Bias mode
1
0
LC0
LCDM0
0
may not
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