UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 389

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UPD78F0838

Manufacturer Part Number
UPD78F0838
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
Address: FF2FH After reset: 00H R
ASIS61
Cautions 1. The operation of the PE61 bit differs depending on the set values of the PS611 and PS601
Symbol
Figure 12-10. Format of Asynchronous Serial Interface Reception Error Status Register 61 (ASIS61)
2. The first bit of the receive data is checked as the stop bit, regardless of the number of stop
3. If an overrun error occurs, the next receive data is not written to receive buffer register 61
4. If data is read from ASIS61, a wait cycle is generated. Do not read data from ASIS6 when the
OVE61
PE61
FE61
bits of asynchronous serial interface operation mode register 61 (ASIM61).
bits.
(RXB61) but discarded.
CPU is operating on the subsystem clock and the high-speed system clock is stopped. For
details, see CHAPTER 32 CAUTIONS FOR WAIT.
7
0
0
1
0
1
0
1
If POWER61 = 0 and RXE61 = 0, or if ASIS61 register is read
If the parity of transmit data does not match the parity bit on completion of reception
If POWER61 = 0 and RXE61 = 0, or if ASIS61 register is read
If the stop bit is not detected on completion of reception
If POWER61 = 0 and RXE61 = 0, or if ASIS61 register is read
If receive data is set to the RXB61 register and the next reception operation is completed before the
data is read.
CHAPTER 12 SERIAL INTERFACES UART60 AND UART61
6
0
Preliminary User’s Manual U19748EJ1V0UD
5
0
Status flag indicating framing error
Status flag indicating overrun error
Status flag indicating parity error
4
0
3
0
PE61
2
FE61
1
OVE61
0
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