UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 343

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UPD78F0838

Manufacturer Part Number
UPD78F0838
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
9.4.2 Setting overflow time of watchdog timer
starts counting again by writing “ACH” to WDTE during the window open period before the overflow time.
Set the overflow time of the watchdog timer by using bits 3 to 1 (WDCS2 to WDCS0) of the option byte (0080H).
If an overflow occurs, an internal reset signal is generated. The present count is cleared and the watchdog timer
The following overflow time is set.
Cautions 1. The combination of WDCS2 = WDCS1 = WDCS0 = 0 and WINDOW1 =
Remarks 1. f
WDCS2
0
1
0
0
0
1
1
1
2. The watchdog timer continues its operation during self-programming and
2. ( ):
WINDOW0 = 0 is prohibited.
EEPROM emulation of the flash memory.
interrupt acknowledge time is delayed. Set the overflow time and window
size taking this delay into consideration.
OSC
WDCS1
Table 9-3. Setting of Overflow Time of Watchdog Timer
: Internal low-speed oscillation clock frequency
1
0
f
0
0
1
0
1
1
OSC
= 264 kHz (MAX.)
Preliminary User’s Manual U19748EJ1V0UD
CHAPTER 9 WATCHDOG TIMER
WDCS0
1
0
0
1
0
1
0
1
2
2
2
2
2
2
2
2
10
11
12
13
14
15
16
17
/f
/f
/f
/f
/f
/f
/f
/f
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
(4.27 ms)
(8.53 ms)
(17.07 ms)
(34.13 ms)
(68.27 ms)
(136.53 ms)
(273.07 ms)
(546.13 ms)
Overflow Time of Watchdog Timer
During processing, the
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