UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 466

• Manufacturer Part Number: UPD78F0838
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

464
Condition for clearing (ACKD0 = 0)
Condition for clearing (STD0 = 0)
Condition for clearing (SPD0 = 0)
ACKD0
When a stop condition is detected
At the rising edge of the next byte’s first clock
Cleared by LREL0 = 1 (exit from communications)
When IICE0 changes from 1 to 0 (operation stop)
Reset
When a stop condition is detected
At the rising edge of the next byte’s first clock following
address transfer
Cleared by LREL0 = 1 (exit from communications)
When IICE0 changes from 1 to 0 (operation stop)
Reset
At the rising edge of the address transfer byte’s first
clock following setting of this bit and detection of a start
condition
When IICE0 changes from 1 to 0 (operation stop)
Reset
STD0
SPD0
Remark
0
1
0
1
0
1
Acknowledge was not detected.
Acknowledge was detected.
Start condition was not detected.
Start condition was detected. This indicates that the address transfer period is in effect.
Stop condition was not detected.
Stop condition was detected. The master device’s communication is terminated and the bus is released.
LREL0: Bit 6 of IIC control register 0 (IICC0)
IICE0:
Bit 7 of IIC control register 0 (IICC0)
Figure 14-6. Format of IIC Status Register 0 (IICS0) (3/3)
CHAPTER 14 SERIAL INTERFACE IIC0
Preliminary User’s Manual U19748EJ1V0UD
Detection of acknowledge (ACK)
Detection of start condition
Detection of stop condition
Condition for setting (ACKD0 = 1)
Condition for setting (STD0 = 1)
Condition for setting (SPD0 = 1)
After the SDA0 line is set to low level at the rising edge of
SCL0’s ninth clock
When a start condition is detected
When a stop condition is detected