UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 745

no-image

UPD78F0838

Manufacturer Part Number
UPD78F0838
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
(2) Oscillation stabilization time select register (OSTS)
This register is used to select the X1 clock oscillation stabilization time when the STOP mode is released. When
the X1 clock is selected as the CPU clock, the operation waits for the time set using OSTS after the STOP mode
is released.
When the internal high-speed oscillation clock is selected as the CPU clock, confirm with OSTC that the desired
oscillation stabilization time has elapsed after the STOP mode is released. The oscillation stabilization time can
be checked up to the time set using OSTC.
OSTS can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets OSTS to 05H.
Address: FFA4H
Symbol
OSTS
Cautions 1. To set the STOP mode when the X1 clock is used as the CPU clock, set OSTS before
Remark
Figure 20-2. Format of Oscillation Stabilization Time Select Register (OSTS)
OSTS2
2. Do not change the value of the OSTS register during the X1 clock oscillation
3. The oscillation stabilization time counter counts up to the oscillation stabilization time
4. The X1 clock oscillation stabilization time does not include the time until clock
f
0
0
0
1
1
X
7
0
: X1 clock oscillation frequency
After reset: 05H
Other than above
executing the STOP instruction.
stabilization time.
set by OSTS.
high-speed oscillation clock is being used as the CPU clock, set the oscillation
stabilization time as follows.
Note, therefore, that only the status up to the oscillation stabilization time set by OSTS
is set to OSTC after STOP mode is released.
oscillation starts (“a” below).
OSTS1
Desired OSTC oscillation stabilization time
OSTS
0
1
1
0
0
6
0
OSTS0
X1 pin voltage
waveform
1
0
1
0
1
CHAPTER 20 STANDBY FUNCTION
R/W
Preliminary User’s Manual U19748EJ1V0UD
If the STOP mode is entered and then released while the internal
5
0
2
2
2
2
2
Setting prohibited
STOP mode release
11
13
14
15
16
/f
/f
/f
/f
/f
X
X
X
X
X
1.02 ms
4.10 ms
8.19 ms
16.38 ms
32.77 ms
4
0
a
f
X
= 2 MHz
Oscillation stabilization time selection
3
0
409.6 s
1.64 ms
3.27 ms
6.55 ms
13.11 ms
f
X
= 5 MHz
OSTS2
Oscillation stabilization time set by
2
204.8 s
819.2 s
1.64 ms
3.27 ms
6.55 ms
f
X
= 10 MHz
OSTS1
1
102.4 s
409.6 s
819.2 s
1.64 ms
3.27 ms
f
X
= 20 MHz
OSTS0
0
743

Related parts for UPD78F0838