UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 207

• Manufacturer Part Number: UPD78F0838
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(1) CPU operating with high-speed system clock (C) after reset release (A)
(2) CPU operating with internal high-speed oscillation clock (B) after reset release (A)
(3) CPU operating with subsystem clock (D) after reset release (A)
(A)
Status Transition
(A)
(A)
10 MHz)
(A)
(A)
more)
Status Transition
(A)
(A)
Remarks 1. (A) to (I) in Table 5-4 correspond to (A) to (I) in Figure 5-14.
(The CPU operates with the internal high-speed oscillation clock immediately after a reset release (B).)
(The CPU operates with the internal high-speed oscillation clock immediately after a reset release (B).)
(B)
(B)
(B)
(B)
(B)
(B)
(B)
2. EXCLK, OSCSEL, EXCLKS, OSCSELS, AMPH:
(C) (X1 clock: less than 10 MHz)
(C) (external main clock: less than
(C) (X1 clock: 10 MHz or more)
(C) (external main clock: 10 MHz or
(D) (XT1 clock)
(D) (external subsystem clock)
(Setting sequence of SFR registers)
(Setting sequence of SFR registers)
Status Transition
MSTOP:
XSEL, MCM0:
CSS:
Table 5-4. CPU Clock Transition and SFR Register Setting Examples (1/5)
Setting Flag of SFR Register
Setting Flag of SFR Register
Bits 7 to 4 and 0 of the clock operation mode select register (OSCCTL)
Bit 7 of the main OSC control register (MOC)
Bits 2 and 0 of the main clock mode register (MCM)
Bit 4 of the processor clock control register (PCC)
Preliminary User’s Manual U19748EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
SFR registers do not have to be set (default status after reset release).
AMPH
0
0
1
1
EXCLKS
0
1
EXCLK
0
1
0
1
OSCSEL
OSCSELS
1
1
1
1
SFR Register Setting
1
1
MSTOP
0
0
0
0
Unnecessary
Stabilization
Waiting for
Necessary
Oscillation
Must not be
Must not be
checked
checked
Must be
Must be
Register
checked
checked
OSTC
XSEL
1
1
1
1
CSS
1
1
MCM0
1
1
1
1
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