UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 204
UPD78F0838
Manufacturer Part Number
UPD78F0838
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0838.pdf
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(3) Example of setting procedure when using the subsystem clock as the CPU clock
(4) Example of setting procedure when stopping the subsystem clock
<1> Setting subsystem clock oscillation
<2> Switching the CPU clock (PCC register)
<1> Confirming the CPU clock status (PCC and MCM registers)
<2> Stopping the subsystem clock (OSCCTL register)
Cautions 1. Be sure to confirm that CLS = 0 when clearing OSCSELS to 0. In addition, stop the watch
Note The setting of <1> is not necessary when while the subsystem clock is operating.
(See 5.6.3 (1) Example of setting procedure when oscillating the XT1 clock and (2) Example of
setting procedure when using the external subsystem clock.)
When CSS is set to 1, the subsystem clock is supplied to the CPU.
Confirm with CLS and MCS that the CPU is operating on a clock other than the subsystem clock.
When CLS = 1, the subsystem clock is supplied to the CPU, so change the CPU clock to the internal
high-speed oscillation clock or high-speed system clock.
When OSCSELS is cleared to 0, XT1 oscillation is stopped (the input of the external clock is disabled).
CSS
CLS
2. The subsystem clock oscillation cannot be stopped using the STOP instruction.
0
0
1
1
timer if it is operating on the subsystem clock.
PCC2
MCS
0
1
0
0
0
0
1
Other than above
Internal high-speed oscillation clock
High-speed system clock
Subsystem clock
PCC1
Preliminary User’s Manual U19748EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
0
0
1
1
0
Note
PCC0
0
1
0
1
0
f
Setting prohibited
SUB
CPU Clock Status
/2
CPU Clock (f
CPU
) Selection
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