UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 344

• Manufacturer Part Number: UPD78F0838
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

9.4.3 Setting window open period of watchdog timer
byte (0080H). The outline of the window is as follows.
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Set the window open period of the watchdog timer by using bits 6 and 5 (WINDOW1, WINDOW0) of the option
Counting
Caution The first writing to WDTE after a reset release clears the watchdog timer, if it is made before the
The window open period to be set is as follows.
Example: If the window open period is 25%
starts
If “ACH” is written to WDTE during the window open period, the watchdog timer is cleared and starts counting
again.
Even if “ACH” is written to WDTE during the window close period, an abnormality is detected and an internal
reset signal is generated.
Cautions 1. The combination of WDCS2 = WDCS1 = WDCS0 = 0 and WINDOW1 =
overflow time regardless of the timing of the writing, and the watchdog timer starts counting
again.
WINDOW1
0
0
1
1
Internal reset signal is generated
if ACH is written to WDTE.
Window close period (75%)
2. The watchdog timer continues its operation during self-programming and
WINDOW0 = 0 is prohibited.
EEPROM emulation of the flash memory.
interrupt acknowledge time is delayed. Set the overflow time and window
size taking this delay into consideration.
Table 9-4. Setting Window Open Period of Watchdog Timer
WINDOW0
0
1
0
1
25%
50%
75%
100%
Preliminary User’s Manual U19748EJ1V0UD
CHAPTER 9 WATCHDOG TIMER
Window Open Period of Watchdog Timer
Counting starts again when
ACH is written to WDTE.
Window open
period (25%)
Overflow
time
During processing, the