XC3S100E Xilinx Corp., XC3S100E Datasheet - Page 30

• Manufacturer Part Number: XC3S100E
• Description: Spartan-3e Fpga Family Complete Data Sheet
• Manufacturer: Xilinx Corp.

Functional Description
Table 14: Carry Logic Functions
30
CYINIT
CY0F
CY0G
CYMUXF
Function
G[4:1]
F[4:1]
Initializes carry chain for a slice. Fixed selection of:
• CIN carry input from the slice below
• BX input
Carry generation for bottom half of slice. Fixed selection of:
• F1 or F2 inputs to the LUT (both equal 1 when a carry is to be generated)
• FAND gate for multiplication
• BX input for carry initialization
• Fixed "1" or "0" input for use as a simple Boolean function
Carry generation for top half of slice. Fixed selection of:
• G1 or G2 inputs to the LUT (both equal 1 when a carry is to be generated)
• GAND gate for multiplication
• BY input for carry initialization
• Fixed "1" or "0" input for use as a simple Boolean function
Carry generation or propagation mux for bottom half of slice. Dynamic selection via CYSELF of:
• CYINIT carry propagation (CYSELF = 1)
• CY0F carry generation (CYSELF = 0)
BY
BX
4
G1
F1
G2
F2
GAND
FAND
A[4:1]
A[4:1]
G-LUT
F-LUT
Figure 22: Carry Logic
D
D
1
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1
CYSELG
1
0
1
CYSELF
0
CY0G
CY0F
COUT
Description
CYMUXG
CIN
CYMUXF
CYINIT
XORG
XORF
FFY
FFX
DS312-2 (v3.6) May 29, 2007
DS312-2_14_021305
Product Specification
YQ
YB
Y
XQ
XB
X
R