XC3S100E Xilinx Corp., XC3S100E Datasheet - Page 143

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XC3S100E

Manufacturer Part Number
XC3S100E
Description
Spartan-3e Fpga Family Complete Data Sheet
Manufacturer
Xilinx Corp.
Datasheet

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18 x 18 Embedded Multiplier Timing
Table 101: 18 x 18 Embedded Multiplier Timing
DS312-3 (v3.6) May 29, 2007
Product Specification
Notes:
1.
2.
3.
4.
Combinatorial Delay
T
Clock-to-Output Times
T
T
T
Setup Times
T
T
T
Hold Times
T
Clock Frequency
F
MULT
MSCKP_P
MSCKP_A
MSCKP_B
MSDCK_P
MSDCK_A
MSDCK_B
MULCKID
MULT
Symbol
Combinatorial delay is less and pipelined performance is higher when multiplying input data with less than 18 bits.
The PREG register is typically used in both single-stage and two-stage pipelined multiplier implementations.
The PREG register is typically used when inferring a single-stage multiplier.
Input registers AREG or BREG are typically used when inferring a two-stage multiplier.
R
Combinatorial multiplier propagation delay from the A and B
inputs to the P outputs, assuming 18-bit inputs and a 36-bit
product (AREG, BREG, and PREG registers unused)
Clock-to-output delay from the active transition of the CLK
input to valid data appearing on the P outputs when using
the PREG register
Clock-to-output delay from the active transition of the CLK
input to valid data appearing on the P outputs when using
either the AREG or BREG register
Data setup time at the A or B input before the active
transition at the CLK when using only the PREG output
register (AREG, BREG registers unused)
Data setup time at the A input before the active transition at
the CLK when using the AREG input register
Data setup time at the B input before the active transition at
the CLK when using the BREG input register
Data hold time at the A and B inputs after the active
transition at the CLK input
Internal operating frequency for a two-stage 18x18
multiplier using the AREG and BREG input registers and
the PREG output register
(2)
Description
(1)
(2,4)
www.xilinx.com
(4)
(4)
3.54
0.20
0.35
Min
0
0
-
-
-
-5
DC and Switching Characteristics
4.34
Speed Grade
Max
0.98
4.42
270
-
-
-
-
(1)
3.98
0.23
0.39
Min
0
0
-
-
-
-4
4.88
Max
1.10
4.97
240
-
-
-
-
(1)
Units
MHz
ns
ns
ns
ns
ns
ns
ns
143

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