TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 80

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
Reset
(3) Port C5 (
input
SCLK1
CTS1
Direction control
Function control
resistor control
Output latch
Pull-up/down
(on bit basis)
(on bit basis)
(on bit basis)
SCLK1 output
PC write
(SCLK1). When it used to serial channel port, it possible to set logical reverse I/O by
PC<PC5>.
PCUDOE<UDEPC5>.
input port without pull-up/pull-down resistor by reset operation.
Port C5 have also function as serial channel I/O (
Port C5 can set pull-up or pull-down resistor by writing 1 data of
Selection of pull-up or pull-down resistor is set by PCUDOE<PC5UD>. This port is to
S
PCUDOE write
PCCR write
PCFC write
Logic reverse
CTS1
PCUDOE<UDEPC5>
PCUDOE<PC5UD>
, SCLK1)
Logic reverse
Figure 3.5.23 Port C5
PC read
A
B
S
91C016-78
Y
Y
S
B
A
CTS1
P-ch (Programmable pull up)
N-ch (Programmable pull down)
) and clock I/O for SIO
PC5 (
CTS1
, SCLK1)
TMP91C016
2008-02-20

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