TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 221

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
Note: This register can’t read and modify and write, because <VLD1IN> bit have different means between
VLDCR1
(0441H)
write data and read data.
Bit symbol
Read/Write
After reset
Function
Voltage
detect
start flag
0: Disable
1: Enable
V1EN
R/W
7
0
Always
write 0
Figure 3.15.5 VLD Mode Control 1 Register
R/W
6
0
-
Interrupt
enable
flag
0: Disable
1: Enable
VLD Mode Control Register
INT1EN
R/W
5
0
91C016-219
Detect
voltage
result and
clear write
0: Normal
1: Voltage
VLD1IN
low
R/W
4
0
Interrupt enable/disable
Voltage detect start
101 to 111 Prohibition
VLD1 detector voltage setting
Detect voltage compare result (Only 0 data write OK)
000
001
010
011
100
Always
write 0
0
1
0
1
0
1
R/W
3
0
-
2.2 V
2.3 V
2.4 V
2.5 V
2.6 V
Interrupt disable
Interrupt enable
Voltage compare turn off
Voltage compare turn on
Input voltage > Detect voltage
Input voltage < Detect voltage
V12
Detect level setting register
2
0
00H to 04H
5 steps
R/W
V11
1
0
TMP91C016
V10
2008-02-20
0
0

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