TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 77

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

PB
(0022H)
PBCR
(0024H)
PBFC
(0025H)
PBUDE
(0020H)
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Note 1: Read-modify-write is prohibited PBCR, PBFC and PBUDE.
Note 2: Because PB0/VLD0, PB1/VLD1 and PB2/VLD2 can’t be controlled those terminal’s function by register,
VLD circuit also receive signals operating input port function.
Pull-up/Pull-down
control
0: Pull-up resistor
1: Pull-down resistor
PB5UD
7
7
7
7
PB4UD
Port B Pull-up/Pull-down Resistor Control Register
6
6
6
6
Figure 3.5.20 Port B Register
0
0: Port
1: INT2
UDEPB5
PB5C
PB5F
PB5
Port B Function Register
Resistor control
Port B Control Register
5
5
5
5
0: Disable
1: Enable
Port B Register
91C016-75
Data from external port (Output latch register is set to 1)
0: Port
1: INT1
UDEPB4
PB4C
PB4F
PB4
W
4
4
4
0
4
W
0: Port
1: INT0
0: Input
PB3C
PB3U
PB3F
PB3
3
3
3
3
1
R/W
W
0
1: Output
PB2C
PB2U
PB2
Pull-up resistor
2
2
2
2
0: Disable
1: Enable
PB1C
PB1U
PB1
1
1
1
1
0
PB0C
PB0U
PB0
TMP91C016
0
0
0
0
2008-02-20