TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 132

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
3.9.2
X: Don’t care, −: Cannot be used
Select System
<SYSCK>
Clock
1 (fs)
0 (fc)
Operation of Each Circuit
(1) Prescaler
SYSCR<PRCK1:0> is divided by 4 and input to the prescaler as φT0. The prescaler can
be run by selecting the baud rate generator as the serial transfer clock.
among the prescaler outputs.
There is a 6-bit prescaler for generating a clock to SIO0. The clock selected using
Table 3.9.2 shows prescaler clock resolution into the baud rate generator.
The baud rate generator selects between 4 clock inputs: φT0, φT2, φT8, and φT32
Table 3.9.2 Prescaler Clock Resolution to Baud Rate Generator
Select Prescaler
<PRCK1:0>
(fc/16 clock)
Clock
(f
FPH
00
10
)
XXX
000 (fc)
001 (fc/2)
010 (fc/4)
011 (fc/8)
100 (fc/16)
XXX
91C016-130
<GEAR2:0>
Gear Value
Prescaler Output Clock Resolution
φT0
2
2
2
2
2
2
2
2
3
4
5
6
/fs
/fc
/fc
/fc
/fc
/fc
φT2
2
2
2
2
2
2
2
4
4
5
6
7
8
8
/fs
/fc
/fc
/fc
/fc
/fc
/fc
2
2
φT8
2
2
2
2
2
10
10
6
6
7
8
9
/fs
/fc
/fc
/fc
/fc
/fc
/fc
φT32
2
2
2
2
2
2
2
10
11
12
12
TMP91C016
8
8
9
/fs
/fc
/fc
/fc
/fc
/fc
/fc
2008-02-20

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