TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 10

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

P70
SCOUT
TA1OUT
P71
OPTTX0
P72
OPTRX0
P73
P74
P90 to P97
KI0 to KI7
PB0
VLD0
PB1
VLD1
PB2
VLD2
PB3
INT0
PB4 to PB5
INT1 to INT2
PC3
TXD1
PC4
RXD1
PC5
SCLK1
PC6
XT1
PC7
XT2
CS2D
CS2E
DRAMOE
EXRD
NMI
CAS
CTS1
WE
Pin Name
Number
of Pins
1
1
1
1
1
8
1
1
1
1
2
1
1
1
1
1
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Port 70: I/O port (with pull-up resistor)
System clock output: Selectable f
8-bit timer output: Timer 0 or timer 1 out
Port 71: I/O port (with pull-up resistor)
SIO0 trance port
Expond chip select 2D: Outputs 0 when address is within specified address
Port 72: I/O port (Shummit input, with pull-up/pull-down resistor)
SIO0 receive port
Expond chip select 2E: Outputs 0 when address is within specified address
Port 73: I/O port (with pull-up resistor)
DRAMOE: Strobe signal for reading external DRAM
External read: Strobe signal for reading external memory
Port 74: I/O port (with pull-up resistor)
Non-maskable interrupt request pin:
Strobe signal for writing data for DRAM (only 2CAS)
Coulmn address strobe: Outputs 0 when address is within specified DRAM
Port: 90 to 97 port: Pin used to input ports
Key input 0 to 7: Pin used of key on wake-up 0 to 7
(Schmitt input, with pull-up resistor)
Port B0: I/O port (with pull-up resistor)
Voltage level detector 0: For main battery, Interrupt request with edge, too
Port B1: I/O port (with pull-up resistor)
Voltage level detector 1: For back up battery, Interrupt request with edge, too
Port B2: I/O port (with pull-up resistor)
Voltage level detector 2: For micon battery, Interrupt request with edge, too
Port B3: I/O port (Schmitt input, with pull-up resistor)
Interrupt request pin 0: Interrupt request pin with programmable
Port B4 to B5: I/O port (Schmitt input, with pull-down resistor)
Interrupt request pin 1 to 2: Interrupt request pin with programmable
Port C3: I/O port (with pull-up resistor)
Serial 1 send data: Open-drain output pin by programmable
Port C4: I/O port (Schmitt input, with pull-up/pull-down resistor)
Serial 1 recive data
Port C5: I/O port (Schmitt input, with pull-up/pull-down resistor)
Serial clock I/O 1
Clear to send
Port C6: I/O port (Open-drain output)
Low-frequency oscillator connection pins
Port C7: I/O port (Open-drain output)
Low-frequency oscillator connection pins
Interrupt request pin with programmable falling edge level or with both
edge levels programmable
91C016-8
level/rising/falling edge
area
area
column address area (only 8 bits access)
rising/falling edge
Functions
FPH
or fs
TMP91C016
2008-02-20