TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 124

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

;Initial setting
;CS0
;CS1
;CS2
;CS3
;CSX
;Port
~
example, it set 1 wait setting. In the same way
16-bit bus and 0 waits,
memory size, need to set that logical address size: fitting to each local area. Actual physical
address is set by each area’s bank register setting.
example isn’t used CSEX setting.
UDS
Secondly, it shows example of initial setting at Figure 3.8.5.
Because
By CS/WAIT controller, each chip selection signal’s memory size, don’t set actual connect
CSEX setting of CS/WAIT controller is except above CS0 to CS3’s setting. This program
Finally pin condition is set. Port 60 to 65 set to
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
,
LDS
.
CS0
(MSAR0), 00H
(MAMR0), 7FH
(B0CS), 81H
(MSAR1), 40H
(MAMR1), FFH
(B1CS), 80H
(MSAR2), C0H
(MAMR2), 7FH
(B2CS), C3H
(MSAR3), 80H
(MAMR3), 7FH
(B3CS), 83H
(BEXCS), 00H
(P6FC), 3FH
(P6FC2), C0H
connect to RAM: 16-bit bus, 8 Mbytes, it need to set 8-bit bus. At this
Figure 3.8.5 Bank Operation S/W Example1
CS3
set 16-bit bus and 3 waits.
91C016-122
; Logical address area: 000000H to 1FFFFFH
; Condition: 16 bits,1wait (8 Mbytes, SRAM)
; Logical address area: 400000H to 7FFFFFH
; Condition: 16 bits, 2 waits (16 Mbytes, Flash ROM)
; Logical address area: C00000H to FFFFFFH
; Condition: 16 bits, 0 waits (16 Mbytes, MROM)
; Logical address area: 800000H to BFFFFFH
; Other: 16 bits, 2 waits (Don’t care)
; Logical address size: 1 Mbyte
; Logical address size: 4 Mbytes
; Logical address size: 4 Mbytes
; Logical address size: 4 Mbytes
; Condition: 16 bits, 3 waits (64 Mbytes, MROM)
;
;
LDS
CS0
,
to
UDS
CS3
: Port 6 setting
, EA24, EA25: Port 6 setting
CS1
CS0
set to 16-bit bus and 2 waits,
,
CS1
,
CS2
,
CS3
, EA24, EA25 and
TMP91C016
2008-02-20
CS2
set