TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 202

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

b.
c.
Note: It need to set the same bus width setting of display RAM, CS/WAIT controller and
Transfer time by data bus width
LCDCTL<BUS1:0>. And that cycle is selectable, type A, type B and type C. Each
type have each timing, for detail, look for timing table.
bus width of LCD driver.
setting value of CS/WAIT controller in case of external RAM.
LCDC operation in HALT mode
mode, LCDC continue operation if CPU in IDLE2 mode. But LCDC stops in case
of IDLE1, STOP mode.
Data bus width of LCD driver can be selected either of byte/nibble/bit by
Readout bus width of source is selectable 8 bits or 16 bits, without concern to
WAIT number of the read cycle is 0 waits in case of built-in RAM and works by
When LCDC is working, CPU executes HALT instruction and changes in HALT
LCDCTL2<RAMBUS>.
91C016-200
TMP91C016
2008-02-20