TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 138

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
TXDCLK
TXD
Timing to writing to the
SIOCLK
transmission buffer
Note 1: If the
Note 2: Transmission starts on the first falling edge of the TXDCLK clock after the
can be avoided. The handshake functions is enabled or disabled by the
SC1MOD<CTSE> setting.
transmission is halted until the
interrupt is generated, it requests the next data send to the CPU. The next data is
written in the transmission buffer and data sending is halted.
setting any port assigned to be the
request send data halt after data receive is completed by software in the RXD interrupt
routine.
Handshake function
transmission.
Use of
When the
Though there is no
CTS1
CTS1
CTS1
a.
Send is suspended
during this period.
signal goes high during transmission, no more data will be sent after completion of the current
TMP91C016
CTS1
Figure 3.9.6
Sender
pin allows data can be sent in units of one frame; thus, overrun errors
Figure 3.9.5 Handshake Function
13
CTS
TXD
pin goes high on completion of the current data send, data
RTS
14
b.
CTS1
91C016-136
pin, a handshake function can be easily configured by
15
(Clear to send) Timing
16
CTS1
RTS
1
pin goes low again. However, the INTTX1
function. The
RXD
RTS
Start bit
TMP91C016
2
Receiver
(Any port)
3
RTS
14
CTS1
should be output high to
15
signal has fallen.
16
1
TMP91C016
2008-02-20
Bit0
2
3

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