TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 109

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

Up
counter
Comparator
timing
Comparator output
(Match detect)
<TA1RUN>
TA01RUN
UC1 Clear
TA1OUT
Bit7 to 2
INTTA1
TA01RUN
TA01MOD
TA1REG
TA1FFCR
P7CR
P7FC
TA01RUN
TA1FF
Bit1
Bit0
φ
T1
X: Don’t care, − : No change
b.
Example: To output a 1.8-µs square wave pulse from the TA1OUT pin at fc = 27 MHz,
Generating a 50% duty ratio square wave pulse
status output via the timer output pin (TA1OUT).
Figure 3.7.10 Square Wave Output Timing Chart (50% duty)
0
← –
← 0
← 0
← X
← X
← –
← –
The state of the timer flip-flop (TA1FF) is inverted at constant intervals and its
7
* Clock state
use the following procedure to make the appropriate register settings. This
example uses TMRA1; however, either TMRA0 or TMRA1 may be used.
6
X
0
0
X
X
–
X
1
5
X
X
0
X
X
–
X
4
X
X
0
X
X
–
X
2
3
–
0
0
1
–
–
–
–
0
1
2
1
0
–
–
3
91C016-107
0
1
–
1
1
–
1
–
0
0
–
–
1
1
1
1
–
0.9 µs at fc = 27 MHz
1
Clock gear:
Stop TMRA1 and clear it to 0.
Select 8-bit timer mode and select φ T1 (0.3 µ s at fc = 27
MHz) as the input clock.
Set the timer register to 1.8 µ s ÷ φ T1 ÷ 2 = 3
Clear TA1FF to 0 and set it to invert on the match detects
signal from TMRA1.
Set P70 to function as the TA1OUT pin.
Start TMRA1 counting.
2
3
0
1
1/1
2
3
TMP91C016
0
2008-02-20