TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 31

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
(5) Runaway provision with ROM protection register
(6) <EMCCR4> register explanation
(00E7hex). These bits are used when you want to operate LCDD and MELODY circuit
without low-frequency clock (XTIN, XTOUT). After reset these two bits set to 0 and low
clock is supplied each LCDD and MELODY circuit. If you write these bits to 1, TA3
(Generate by timer 3) is supplied each LCDD and MELODY circuit. In this case, you
should set 32 kHz timer 3 frequency. For detail, look AC specification characteristics.
(Purpose)
(Operation explanation)
It is assigned <TA3LCDE> at bit0 and <TA3MLDE> at bit1, of EMCCR4 register
runaway of program, INTP1 is occurred and detects runaway function.
ROM, Program ROM are as follows on the logical address memory map.
up with EMCCR3<ENFROM, ENDROM, ENPROM>. And INTP1 interruption
occurred within which ROM can confirm each with EMCCR3<FFLAG, DFLAG,
PFLAG>. This flag is cleared when write in 0.
Provision in runaway of program by noise mixing.
When write operation was executed for external three kinds of ROM by
Three kinds of ROM is fixed as for Flash ROM (Option-program ROM), Data
1. Flash ROM:
2. Data ROM:
3. Program ROM:
For these address, admission/prohibition of detection of write operation sets it
Address 400000H to 7FFFFFH
Address 800000H to BFFFFFH
Address C00000H to FFFFFFH
91C016-29
TMP91C016
2008-02-20

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