TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 186

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
b.
Disabling the timer
prevent malfunction by 1s Carry hold circuit. During a timer prohibited, 1s Carry
hold circuit holds one sec. carry signal which is generated from divider. After
becoming timer enable state, output the carry signal to timer and revise time and
continue operation. However, timer is late when timer disabling state continues
for one second or more. During timer disabling, pay attention with system power
is downed. In this case the timer is stopped and time is delayed.
may added 1 or 2 sec at the case of only after power supply is on. To avoid it, the
below is recommended setting flow.
Carry of a timer is prohibited when write “0” to PAGER<ENATMR> and can
Since clock hold circuit is not initialized by external
Figure 3.12.5 Flowchart of Timer Disable
Write the clock data
Disable the clock
Enable the timer
Start
End
91C016-184
RESET
, a second counter
TMP91C016
2008-02-20

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