TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 160
![no-image](/images/manufacturer_photos/0/6/668/toshiba_sml.jpg)
TMP91xy16FG
Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP91XY16FG.pdf
(282 pages)
Specifications of TMP91xy16FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
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SIRCR
(0207H)
Bit symbol
Read/Write
After reset
Function
Select
transmit
pulse
width
0: 3/16
1: 1/16
PLSEL
7
0
Receive
data
0: H pulse
1: L pulse
RXSEL
6
0
Figure 3.9.27 IrDA Control Register
Transmit
0: Disable
1: Enable
TXEN
5
0
91C016-158
Receive
0: Disable
1: Enable
RXEN
4
0
R/W
Select receive pulse width
Set effective pulse width for equal or more than
2x × x (value + 1) + 100ns
Can be set:
Can not be set: 0, 15
SIRWD3
3
0
Select receive pulse width
Receive operation
Transmit operation
Select transmit pulse width
Note: If a pulse width complying with the IrDA1.0
Formula: Effective pulse width
0000
0001
1110
1111
to
0
1
0
1
0
1
x = 1/f
standard (1.6 µ s min.) can be guaranteed with a
low baud rate, setting this bit to “1” shortens the
duration of infrared ray activation, resulting in
reduced power dissipation.
SIRWD2
Cannot be set
Can not be set
Equal or more than 4x + 100 ns
Equal or more than 30x + 100 ns
Disabled
Enabled
Disabled
Enabled
3/16
1/16
1 to 14
2
0
FPH
SIRWD1
≥ 2x × x (value + 1) + 100ns
1
0
SIRWD0
TMP91C016
0
2008-02-20
0
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