TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 239

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
No.
AC measuring conditions
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
• Output level: High = 0.7 V, Low = 0.3 V, CL = 50 pF
• Input level: High = 0.9 V, Low = 0.1 V
f
A0 to A23 valid →
SR mode (LCDC DMA case: READ only)
A0 to A23 valid → D0 to D15 input
SR mode (LCDC DMA case)
SR mode (LCDC DMA case)
D0 to D15 valid →
D0 to D15 valid →
A0 to A23 valid →
SR mode (LCDC DMA case: READ only)
A0 to A23 valid → Port input
A0 to A23 valid → Port hold
A0 to A23 valid → Port valid
RD
DS
RD
RD
RD
DS
DS
RD
FPH
WR
WR
WR
(2) Vcc = 2.0 V ± 10%
/
rise → A0 to A23 hold
low width
rise → A0 to A23 hold
rise → D0 to D15 hold
rise → A0 to A23 hold
fall → D0 to D15 input
low width
rise → D0 to A15 hold
period (= x)
low width
rise → D0 to D15 hold
WR
fall →
Parameter
WAIT
RD
WAIT
DS
WR
/
hold
rise
WR
rise
input
fall
(1 + N) WAIT mode
(1 + N) WAIT mode
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
FPH
AC
CAR
CAW
AD
RD
RR
HR
WW
DW
WD
AW
CW
APH
APH2
APO
91C016-237
1.5x − 46
2.5x − 30
2.0x − 30
2.0x − 30
2.0x − 30
1.5x − 70
1.5x − 70
0.5x −30
2.5x + 0
2.0x + 0
x − 46
x − 26
x − 26
x − 50
x − 50
Min
3.5x
100
0
Variable
3.5x − 120
3.5x − 178
3.5x + 120
3.5x − 48
2.5x − 48
2.0x − 48
31250
Max
Min
100
104
220
170
170
170
250
200
350
f
54
20
74
74
80
80
50
50
FPH
0
= 10 MHz
Max
302
202
152
230
172
470
TMP91C016
2008-02-20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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