ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 422
ATxmega64A4U
Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A4U
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A4U-AU
Manufacturer:
ON
Quantity:
29 000
Company:
Part Number:
ATxmega64A4U-U
Manufacturer:
ATMEL
Quantity:
74
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32.6
32.6.1
32.6.2
8331A–AVR–07/11
Register Description - PDI Instruction and Addressing Registers
Instruction Register
Pointer Register
Figure 32-14. PDI instruction set summary.
The PDI instruction and addressing registers are internal registers utilized for instruction decod-
ing and PDIBUS addressing. None of these registers are accessible as registers in a register
space.
When an instruction is successfully shifted into the physical layer shift register, it is copied into
the instruction register. The instruction is retained until another instruction is loaded. The reason
for this is that the REPEAT command may force the same instruction to be run repeatedly,
requiring command decoding to be performed several times on the same instruction.
The pointer register is used to store an address value that specifies locations within the PDIBUS
address space. During direct data access, the pointer register is updated by the specified num-
ber of address bytes given as operand bytes to an instruction. During indirect data access,
REPEAT
LDCS
STCS
KEY
LDS
STS
LD
ST
0
0
0
0
1
1
1
1
Cmd
Cmd
0
1
0
1
0
1
0
1
0
0
1
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
Size A
Ptr
CS Address
0
0
0
Size A/B
Size B
Size B
0
Atmel AVR XMEGA AU
Cmd
0
0
0
0
1
1
1
1
Size A - Address size (direct access)
0
0
1
1 1
Ptr - Pointer access (indirect access)
0
0
1
1 1
Size B - Data size
0
0
1
1 1
CS Address (CS - Control/Status reg.)
0
0
0
0
1
0
0
1
1 1
0 0
0
1
1 1
0
1
0
0
1
0
0
1
0
0 0
0 0
0 1
0 1
1 1
0
1
0
1
0
Byte
Word (2 Bytes)
3 Bytes
Long (4 Bytes)
*(ptr)
*(ptr++)
ptr
ptr++ - Reserved
Byte
Word (2 Bytes)
3 Bytes
Long (4 Bytes)
LDS
LD
STS
ST
LDCS (LDS Control/Status)
REPEAT
STCS (STS Control/Status)
KEY
0
1
0
1
1
Register 0
Register 1
Register 2
Reserved
Reserved
......
422
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