ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 326
ATxmega64A4U
Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A4U
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A4U-AU
Manufacturer:
ON
Quantity:
29 000
Company:
Part Number:
ATxmega64A4U-U
Manufacturer:
ATMEL
Quantity:
74
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26.5
26.6
8331A–AVR–07/11
CRC on DMA Data
CRC using the I/O Interface
CRC-16 or CRC-32 calculations can be performed on data passing through any DMA channel.
Once a DMA channel is selected as the source, the CRC module will continuously generate the
CRC on the data passing through the DMA channel. The checksum is available for readout once
the DMA transaction is completed or aborted. A CRC can be performed not only on communica-
tion data, but also on data in SRAM or I/O memory by passing these data through a DMA
channel. If the latter is done, the destination register for the DMA data can be the data input
(DATAIN) register in the CRC module. Refer to
for more details on setting up DMA transactions.
CRC can be performed on any data by loading them into the CRC module using the CPU and
writing the data to the DATAIN register. Using this method, an arbitrary number of bytes can be
written to the register by the CPU, and CRC is done continuously for each byte. New data can
be written for each cycle, or whenever new data or the CPU is available to load more data. The
CRC complete is signaled by writing to the BUSY bit in the STATUS register.
”DAC - Digital to Analog Converter” on page 382
Atmel AVR XMEGA AU
326
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