ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 253
ATxmega64A4U
Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A4U
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A4U-AU
Manufacturer:
ON
Quantity:
29 000
Company:
Part Number:
ATxmega64A4U-U
Manufacturer:
ATMEL
Quantity:
74
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20.14.2
8331A–AVR–07/11
CTRL – Endpoint Control
• Bit 3 – BANK: Bank Select Flag
When ping-pong mode is enabled, this bit indicates which bank will be used for the next transac-
tion. BANK is toggled each time a transaction has completed successfully. This bit is not in use
when ping-pong is disabled. This flag is cleared by writing a one to its bit location.
• Bit 2 – BUSNACK1 : Data Buffer 1 Not Acknowledge Flag
When this flag is set, the USB module will discard incoming data to data buffer 1 in an OUT
transaction, and will not return any data from data buffer 1 in an IN transaction. For control, bulk
and interrupt endpoints a NAK handshake is returned. This flag is cleared by writing a one to its
bit location.
• Bit 1 – BUSNACK0 : Data Buffer 0 Not Acknowledge Flag
When this flag is set, the USB module will discard incoming data to data buffer 0 in an OUT
transaction, and will not return any data from data buffer 0 in an IN transaction. For control, bulk
and interrupt endpoints a NAK handshake is returned. This flag is cleared by writing a one to its
bit location.
• Bit 0 – TOGGLE : Data Toggle Flag
This indicates if a DATA0 or DATA1 PID is expected in the next data packet for an output end-
point, and if a DATA0 or DATA1 PID will be sent in the next transaction for an input endpoint.
This bit has no effect for isochronous endpoints, where both DATA0 and DATA1 PIDs are
accepted for output endpoint, and only DATA0 PIDs are sent for input endpoints.
Note:
• Bit 7:6 – TYPE[1:0]: Endpoint Type
These bits are used to enable and select the endpoint type. If the endpoint is disabled, the
remaining 7 endpoint configuration bytes are never read or written by the USB module and their
SRAM locations are free to use for other application data.
Table 20-4.
• Bit 5 – MULTIPKT: Multi Packet Transfer Enable
Setting this bit enables multi-packet transfers. Multi-packet transfer enables a data payload
exceeding the maximum packet size of an endpoint to be transferred as multiple packets without
Bit
+0x01
Read/Write
Initial Value
TYPE[1:0]
1. For isochronous endpoints
00
01
10
11
R/W
7
0
Endpoint type
TYPE[1:0]
R/W
DISABLE
CONTROL
BULK
ISOCHRONOUS
Group Configuration
6
0
MULTIPKT
R/W
5
0
PINGPONG
R/W
4
0
Description
Endpoint enabled
Control
Bulk/ Interrupt
Isochronous
INTDSBL
R/W
3
0
Atmel AVR XMEGA AU
STALL
R/W
2
0
SIZE[2:0]
R/W
1
0
SIZE[1:0]
(1)
R/W
0
0
CTRL
253
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