ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 142
ATxmega64A4U
Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A4U
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A4U-AU
Manufacturer:
ON
Quantity:
29 000
Company:
Part Number:
ATxmega64A4U-U
Manufacturer:
ATMEL
Quantity:
74
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13.3.1.2
13.3.2
13.3.3
8331A–AVR–07/11
Bus-keeper
Wired-OR
Totem-pole with Pull-up
In this mode, the configuration is as for totem-pole, expect the pin is configured with internal pull-
up when set as input.
Figure 13-4. I/O pin configuration - Totem-pole with pull-up (on input).
In the bus-keeper configuration, it provides a weak bus-keeper that will keep the pin at its logic
level when the pin is no longer driven to high or low. If the last level on the pin/bus was 1, the
bus-keeper configuration will use the internal pull resistor to keep the bus high. If the last logic
level on the pin/bus was 0, the bus-keeper will use the internal pull resistor to keep the bus low.
Figure 13-5. I/O pin configuration - Totem-pole with bus-keeper.
In the wired-OR configuration, the pin will be driven high when the corresponding bits in the OUT
and DIR registers are written to one. When the OUT register is set to zero, the pin is released,
allowing the pin to be pulled low with the internal or an external pull-resistor. If internal pull-down
is used, this is also active if the pin is set as input.
OUTn
OUTn
DIRn
DIRn
INn
INn
Atmel AVR XMEGA AU
Pn
Pn
142
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