ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 392
ATxmega64A4U
Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A4U
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A4U-AU
Manufacturer:
ON
Quantity:
29 000
Company:
Part Number:
ATxmega64A4U-U
Manufacturer:
ATMEL
Quantity:
74
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29.11 Register Summary
8331A–AVR–07/11
Address
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
+0x08
+0x09
+0x0A
+0x0B
+0x12
+0x13
+0x14
+0x15
+0x16
+0x17
+0x18
+0x19
+0x1A
+0x1B
Name
CTRLA
CTRLB
CTRLC
EVCTRL
Reserved
STATUS
Reserved
Reserved
CH0GAINCAL
CH0OFFSETCAL
CH0GAINCAL
CH0OFFSETCAL
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
CH0DATAL
CH0DATAH
CH1DATAL
CH1DATAH
This is the I/O summary when the DAC is configured to give standard 12-bit results. I/O sum-
mary for 12-bit left adjusted will be similar, but with some changes in the data registers
CHnDATAL and CHnDATAH.
Bit 7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Bit 6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
CHSEL[1:0]
Bit 5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
IDOEN
Bit 4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
REFSEL[1:0]
CH0OFFSETCAL[7:0]
CH1OFFSETCAL[7:0]
CH0GAINCAL[7:0]
CH1GAINCAL[7:0]
CHDATA[7:0]
CHDATA[7:0]
CH1EN
Bit 3
–
–
–
–
–
–
–
–
–
–
–
Atmel AVR XMEGA AU
CH0EN
Bit 2
–
–
–
–
–
–
–
–
–
–
–
-
CHDATA[11:8]
CHDATA[11:8]
EVSEL[3:0]
LPMODE
CH1TRIG
CH1DRE
Bit 1
–
–
–
–
–
–
–
–
–
-
CH0TRIG
LEFTADJ
CH0DRE
ENABLE
Bit 0
–
–
–
–
–
–
–
–
–
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