ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 232
ATxmega64A4U
Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A4U
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A4U-AU
Manufacturer:
ON
Quantity:
29 000
Company:
Part Number:
ATxmega64A4U-U
Manufacturer:
ATMEL
Quantity:
74
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8331A–AVR–07/11
To maximize throughput, an endpoint address can be configured for Ping-Pong operation. When
done, the input and output endpoints are both used in the same direction. The CPU or DMA
Controller can then read/write one data buffer while the USB module writes/reads the others and
vice versa. This gives double buffered communication.
Multi-packet transfer enables a data payload exceeding the maximum packet size of an end-
point to be transferred as multiple packets without software intervention. This reduces the CPU
intervention and the interrupts needed for USB transfers.
For low power operation, the USB module can put the microcontroller in any sleep mode when
the USB bus is idle and a suspend condition is given. Upon bus resumes, the USB module can
wake up the microcontroller from any sleep mode.
Figure 20-1. USB OUT Transfer: DATA packet from HOST to USB device
Figure 20-2. USB IN Transfer: DATA packet from USB device to HOST after request from
HOST
DM
HOST
DP
DM
DP
EPT 2
BULK OUT
D
A
A
T
0
EPT 2
HOST
D
A
A
T
1
N
O
N
T
K
E
I
D
A
T
A
0
D
A
T
A
0
EPT 2
EPT 3
D
A
A
T
1
D
A
A
T
0
D
A
T
A
0
BULK OUT
D
A
T
A
1
N
O
N
EPT 3
T
K
E
I
D
A
T
A
0
D
A
T
A
0
D
A
T
A
D
A
T
A
1
1
EPT 3
D
A
T
A
0
D
A
A
T
0
EPT 1
D
A
T
A
1
BULK OUT
D
A
A
T
0
D
A
A
T
0
EPT 1
D
A
T
A
1
O
N
T
K
E
N
I
D
A
T
A
0
D
A
A
T
0
EPT 1
time
D
A
T
A
1
D
A
A
T
0
time
Atmel AVR XMEGA AU
Buffers
Buffers
USB
USB
CPU
USB
USB
ENDPOINT 1 DATA
ENDPOINT 3 DATA
ENDPOINT 2 DATA
Configuration Table
ENDPOINT 1 DATA
ENDPOINT 3 DATA
ENDPOINT 2 DATA
Configuration Table
USB Endpoints
Internal SRAM
USB Endpoints
Internal SRAM
USBEPPTR
USBEPPTR
232
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