ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 131
ATxmega64A4U
Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A4U
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A4U-AU
Manufacturer:
ON
Quantity:
29 000
Company:
Part Number:
ATxmega64A4U-U
Manufacturer:
ATMEL
Quantity:
74
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11.8
8331B–AVR–06/11
Address
+0x00
+0x01
+0x02
Register Summary
Name
WINCTRL
STATUS
CTRL
• Bit 7:1 – Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 0 – SYNCBUSY
When writing to the CTRL or WINCTRL registers, the WDT needs to be synchronized to the
other clock domains. During synchronization, the SYNCBUSY bit will be read as one. This bit is
automatically cleared after the synchronization is finished. Synchronization will take place only
when the ENABLE bit for the Watchdog Timer is set.
Bit 7
–
–
–
Bit 6
–
–
–
Bit 5
–
Bit 4
–
WPER[3:0]
PER[3:0]
Bit 3
–
ATMEL CONFIDENTIAL
Atmel AVR XMEGA AU
Bit 2
–
ENABLE
Bit 1
WEN
–
SYNCBUSY
Bit 0
WCEN
CEN
Page
128
129
130
131
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