ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 373
ATxmega64A4U
Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A4U
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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28.16.12 CMPH – Compare register High
28.16.13 CMPL – Compare register Low
28.17 Register Description - ADC Channel
28.17.1
8331A–AVR–07/11
CTRL – Channel Control Register
• Bit 3:0 – Reserved
These bits are reserved and will always read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
The CMPH and CMPL register pair represents the 16-bit value CMP. For details on reading and
writing 16-bit registers refer to
• Bit 7:0 – CMP[15:0]: ADC Compare value high byte
These are the 8 MSB of the 16-bit ADC compare value. In signed mode, the number representa-
tion is 2's complement and the MSB is the sign bit.
• Bit 7:0 – CMP[7:0]: ADC compare value high byte
These are the 8 LSB of the 16-bit ADC compare value. In signed mode, the number representa-
tion is 2's complement.
• Bit 7 – START: START Conversion on Channel
Setting this bit will start a conversion on the channel. The bit is cleared by hardware when the
conversion has started. Setting this bit when it already is set will have no effect. Writing or read-
ing these bits is equivalent to writing the CH[3:0]START bits in
page
• Bit 6:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 4:2 – GAIN[2:0]: ADC Gain Factor
These bits define the gain factor for the ADC gain stage.
Bit
+0x18
Read/Write
Initial Value
Bit
+0x19
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
366.
START
R/W
7
0
R/W
R/W
7
0
7
0
R
R/W
6
–
0
R/W
6
0
6
0
Section 3.11 ”Accessing 16-bit Registers” on page
R/W
R
R/W
5
–
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
CMP[15:0]
CMP[7:0]
GAIN[2:0]
R/W
Atmel AVR XMEGA AU
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
”CTRLA – Control Register A” on
R/W
R/W
R/W
INPUTMODE[1:0]
1
0
1
0
1
0
R/W
R/W
R/W
0
0
0
0
0
0
12.
CMPH
CMPL
CTRL
373
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