DS31256 Maxim Integrated Products, DS31256 Datasheet - Page 42

• Manufacturer Part Number: DS31256
• Description: IC CTRLR HDLC 256-CHANNEL 256BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS31256

• Controller Type: HDLC Controller
• Interface: Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 500mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Note: Bits that are underlined are read-only; all other bits are read-write.
Bit 2/Status Bit for Receive HDLC CRC Error (RCRCE)
Bit 3/Status Bit for Receive HDLC Abort Detected (RABRT)
Bit 4/Status Bit for Receive HDLC Length Check (RLENC)
Bit 5/Status Bit for Receive FIFO Overflow (ROVFL)
Bit 6/Status Bit for Receive DMA Large Buffer Read (RLBR)
Bit 7/Status Bit for Receive DMA Large Buffer Read Error (RLBRE)
Bit 8/Status Bit for Receive DMA Small Buffer Read (RSBR)
Bit 9/Status Bit for Receive DMA Small Buffer Read Error (RSBRE)
Bit 10/Status Bit for Receive DMA Done-Queue Write (RDQW)
Bit 11/Status Bit for Receive DMA Done-Queue Write Error (RDQWE)
Bit 12/Status Bit for Transmit FIFO Underflow (TUDFL)
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
TDQWE
RLBRE
15
7
0
0
ISDMA
Interrupt Mask Register for SDMA
002Ch
TDQW
RLBR
14
6
0
0
ROVFL
TPQR
13
5
0
0
RLENC
TUDFL
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12
4
0
0
RDQWE
RABRT
11
3
0
0
RCRCE
RDQW
10
2
0
0
RSBRE
n/a
1
0
9
0
RSBR
n/a
0
0
8
0