DS31256 Maxim Integrated Products, DS31256 Datasheet - Page 2

IC CTRLR HDLC 256-CHANNEL 256BGA

DS31256

Manufacturer Part Number
DS31256
Description
IC CTRLR HDLC 256-CHANNEL 256BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS31256

Controller Type
HDLC Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
500mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS31256
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS31256
Manufacturer:
DALLAS
Quantity:
20 000
Part Number:
DS31256+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Company:
Part Number:
DS31256+
Quantity:
514
Part Number:
DS31256B
Manufacturer:
Maxim Integrated
Quantity:
10 000
1.
2.
3.
4.
5.
6.
7.
8.
9.
3.1
3.2
3.3
3.4
3.5
3.6
3.7
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
4.10
4.11
4.12
5.1
5.2
5.3
5.4
6.1
6.2
6.3
6.4
6.5
6.6
7.1
7.2
8.1
8.2
9.1
9.2
5.3.1
5.3.2
8.1.1
8.1.2
9.2.1
9.2.2
9.2.3
9.2.4
MAIN FEATURES............................................................................................................6
DETAILED DESCRIPTION ..............................................................................................7
SIGNAL DESCRIPTION ................................................................................................13
MEMORY MAP ..............................................................................................................26
GENERAL DEVICE CONFIGURATION AND STATUS/INTERRUPT...........................32
LAYER 1 ........................................................................................................................44
HDLC .............................................................................................................................67
FIFO ...............................................................................................................................74
DMA ...............................................................................................................................83
O
S
L
JTAG S
PCI B
PCI E
S
I
G
R
T
C
HDLC R
BERT R
R
T
FIFO R
PCI C
PCI C
M
M
S
T
G
P
L
R
BERT .......................................................................................................................................60
BERT R
G
HDLC R
G
FIFO R
I
R
NTRODUCTION
NTRODUCTION
OCAL
AYER
RANSMIT
RANSMIT
EST
ERIAL
UPPLY AND
TATUS AND
ORT
ECEIVE
HANNELIZED
ECEIVE
ECEIVE
ECEIVE
VERVIEW
ENERAL
ENERAL
ENERAL
ENERAL
ASTER
ASTER
General Description of Operation ....................................................................................................... 34
Status and Interrupt Register Description ........................................................................................... 37
Receive High Watermark .................................................................................................................... 76
Transmit Low Watermark .................................................................................................................... 76
Overview ............................................................................................................................................. 85
Packet Descriptors .............................................................................................................................. 90
Free Queue ......................................................................................................................................... 92
Done Queue........................................................................................................................................ 97
R
US
XTENSION
R
ONFIGURATION
ONFIGURATION
B
1 C
EGISTER
P
EGISTER
EGISTERS
EGISTER
IGNAL
US
EGISTERS
EGISTER
EGISTERS
EGISTER
R
C
ORT
S
P
DMA R
V.54 D
S
C
D
D
D
/S
P
DMA R
ESET AND
ONFIGURATION
ONFIGURATION
IGNAL
ORT
IDE
ONFIGURATION
ESCRIPTION
ESCRIPTION
ESCRIPTION AND
S
ORT
IGNAL
T
I
IGNAL
NTERRUPT
I
EST
P
NTERFACE
D
...........................................................................................................................85
..........................................................................................................................26
..........................................................................................................................83
R
ORT
ESCRIPTION
D
S
ETECTOR
D
R
EGISTERS
D
D
EGISTERS
D
D
(9
IGNALS
ESCRIPTION
EGISTERS
ESCRIPTION
EGISTERS
ESCRIPTIONS
S
ESCRIPTION
(5
(4
L
ESCRIPTION
ESCRIPTION
D
XX
IGNAL
IST
R
ID R
XX
XX
ESCRIPTION
R
R
EGISTERS
) .............................................................................................................30
EGISTERS FOR
EGISTERS FOR
)............................................................................................................29
)............................................................................................................29
.............................................................................................................13
.............................................................................................................44
.............................................................................................................67
............................................................................................................34
...........................................................................................................25
S
EGISTER
..........................................................................................................56
R
R
D
IGNAL
R
(7
(1
EGISTER
TABLE OF CONTENTS
EGISTER
ESCRIPTION
......................................................................................................22
(8
E
EGISTERS
(2
XX
XX
XAMPLE
...................................................................................................43
...................................................................................................76
XX
XX
..................................................................................................22
) ...............................................................................................29
.................................................................................................48
.................................................................................................61
.................................................................................................69
)...............................................................................................27
(3
) .............................................................................................30
D
).............................................................................................27
..............................................................................................19
D
XX
ESCRIPTION
ESCRIPTION
D
D
) .......................................................................................28
F
F
.......................................................................................74
ESCRIPTION
ESCRIPTION
(0
UNCTION
UNCTION
2 of 183
....................................................................................25
XX
) .............................................................................26
..........................................................................18
........................................................................32
0 (PIDSEL/A
1 (PIDSEL/B
....................................................................32
....................................................................51
XX
XX
).............................................31
).............................................31

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