XS1-L02A-QF124-I5 XMOS, XS1-L02A-QF124-I5 Datasheet - Page 30

• Manufacturer Part Number: XS1-L02A-QF124-I5
• Description: IC MPU 32BIT DUAL CORE 124QFN
• Manufacturer: XMOS

Specifications of XS1-L02A-QF124-I5

• Processor Type: XCore 32-Bit
• Speed: 500MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 124-TFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 880-1031

XMOS
The XCore can only be switched off co-operatively by writing a ’1’ into the sleep
register (bit 0 of processor control register 9). It is woken up on one of two
conditions: the wake-up pin was asserted for at least 0.1 s, or the wake-up
counter reached 0. The wake-up counter can be set by writing a 32-bit value into
the wake-up counter register (processor control register 8). The wake-up counter
counts at the external oscillator frequency. On wake-up the chip is brought up
from power-on reset, which may take x s.
Figure
XS1-L S
• VDD at the chip IO must remain within specification, regardless of the
• SS VDD GATE must be pulled to a minimum of 3.3v.
pins at valid logic levels (pull-ups or pull-downs may be required).
voltage drop across the FET.
5
YSTEM
shows the state machine of the XCore entering and leaving sleep mode.
Sleep
S
PECIFICATION
Sleeping
Active
RST
RST
Figure 5 PCU state diagram
VDDCnt == 0
(0.9)
Count == 0
SS_ENABLE
Resetting
RST
rel
RST
RST
Energising
Waiting
VDDCnt != 0
VDD_Core up
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