XS1-L02A-QF124-I5 XMOS, XS1-L02A-QF124-I5 Datasheet - Page 15

• Manufacturer Part Number: XS1-L02A-QF124-I5
• Description: IC MPU 32BIT DUAL CORE 124QFN
• Manufacturer: XMOS

Specifications of XS1-L02A-QF124-I5

• Processor Type: XCore 32-Bit
• Speed: 500MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 124-TFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 880-1031

XMOS
14/40
3.2.5 Network numbers
A link can be assigned to be part of one of four “networks”. That is, the link will
only carry traffic belonging to that network. For this to work, both channel ends
must also be made part of this network. The intended use of this is to assign
specific links to carry small control messages.
When setting up networks, no traffic should flow over the target network, as
routing would be ambiguous. Network assignments are designed to be static,
but if a link needs to be reassigned to, for example, the default network, the link
should be disabled before the assignment is changed.
3.2.6 XS1-L Llink Layer configuration
Before a link can be used it must be enabled and a HELLO must be issued.
These actions are performed by writing a ’1’ to the appropriate bit in the speed
registers (details are shown in Section 9.3).
On a system-reset the input FIFO is emptied, the output FIFO is emptied, and
the credit and issued counters are set to zero. The link must then be enabled
and a HELLO must be issued. In the case of hot-plugging, two bits of the speed-
register can be read to establish whether credits have been issued or received.
3.3 Switch layer
The switch layer forwards messages from one link to another. This forwarding is
either static (non-routed links) or dynamic (routed links).
3.3.1 Non-routed links
Links can be set to deliver data to a statically determined channel-end, instead of
using the routing table. In non-routed mode no header is sent, and the message
is sent to a specified processor and channel-end. This mode is enabled by
setting bit 31 in the LLink static forwarding header register, on both sides of the
LLink.
XS1-L S
S
(0.9)
2008/08/25
YSTEM
PECIFICATION