XS1-L02A-QF124-I5 XMOS, XS1-L02A-QF124-I5 Datasheet - Page 24

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XS1-L02A-QF124-I5

Manufacturer Part Number
XS1-L02A-QF124-I5
Description
IC MPU 32BIT DUAL CORE 124QFN
Manufacturer
XMOS

Specifications of XS1-L02A-QF124-I5

Processor Type
XCore 32-Bit
Speed
500MHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
124-TFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
880-1031
XMOS
NOTE: The Node Identifier in a configuration message need not match the Node
Identifier in the destination switch, allowing a configuration message to be used
to initialise the switch Node Identifier.
Configuration messages follow the format specified in the previous section (re-
member that the header is generated by the channel-end):
This results in the following reply message:
XS1-L S
• WRITEC control token (value 0xC0)
• Return channel end identifier (Node, Processor, Channel-end)
• Address within switch (address[15 ... 8], address[7 ... 0])
• Data to be written (data[31 ... 24], data[23 ... 16], data[15 ... 8], data[7 ... 0])
• END control token (value (0x01)
• ACK control token (value 0x03)
• END control token (value 0x01)
LDC
LDC
GETR
SETD
OUTCTI r5, 0xC0
OUTT
OUTT
SHR
OUTT
byte
3,2
1
0
YSTEM
value
The Node Identifier of the switch to be configured
The numerical value for the PSCTRL or SSCTRL control
token: 0xC3 or 0xC2
12
S
r11, 0
r0, 0xC20C // Chan end for SSwitch ctrl on node 0
r5, 2
r5, r0
r5, r11
r5, r11
r1, r0, 8
r5, r1
PECIFICATION
(0.9)
// preload0
// Get a channel end
// set dest of chan end to SSwitch
// WRITEC token
// return address: node 0
// return address: processor 0
// return address: chan-id stored in r0
2008/08/25
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