XS1-L02A-QF124-I5 XMOS, XS1-L02A-QF124-I5 Datasheet - Page 27

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XS1-L02A-QF124-I5

Manufacturer Part Number
XS1-L02A-QF124-I5
Description
IC MPU 32BIT DUAL CORE 124QFN
Manufacturer
XMOS

Specifications of XS1-L02A-QF124-I5

Processor Type
XCore 32-Bit
Speed
500MHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
124-TFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
880-1031
XMOS
5 Power control
The XS1-L has three modes:
5.1 Active and standby mode
The XS1-L can be set to consume less dynamic power by reducing the clock
frequency. When running at reduced clock frequency the XS1-L is in standby
mode, when running at full clock frequency the XS1-L is in active mode.
The level of standby power is determined by the value of PLL CLK DIVIDER in
the PSWITCH. A value of 0 means no power saving, a value of n means that the
frequency is reduced by a factor 1 (n + 1), reducing power by a factor 1 (n + 1).
Hence setting this register to 99 will cause the processor to run 100 times slower
in standby mode and use 100 times less dynamic power.
The processor can switch automatically between active and standby modes, or
it can switch when the program requests it to. This behaviour is controlled by
bits 5 and 4 in PS XCORE CTRL0 (processor status register 2)
Timers and non-buffered ports work as usual when in standby mode, hence
either can be used to wake-up a thread and switch the processor back to Active
mode.
XS1-L S
• Active mode, where the core is active and all clocks run at operational
• Standby mode, where the core voltage remains present, but the chip is in
• Sleep mode, where the core voltage is removed.
Bits [5:4]
frequency.
a low power state.
YSTEM
00
01
11
S
mode
Active mode only - processor runs at full speed (400 MIPS)
Standby mode only - processor runs at one n-th of the
speed (400 n MIPS)
Active mode if any thread is active, standby if there are no
active threads
PECIFICATION
(0.9)
2008/08/25
26/40

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