XS1-L02A-QF124-I5 XMOS, XS1-L02A-QF124-I5 Datasheet - Page 18

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XS1-L02A-QF124-I5

Manufacturer Part Number
XS1-L02A-QF124-I5
Description
IC MPU 32BIT DUAL CORE 124QFN
Manufacturer
XMOS

Specifications of XS1-L02A-QF124-I5

Processor Type
XCore 32-Bit
Speed
500MHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
124-TFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
880-1031
XMOS
3.3.3 XS1-L Switch Layer configuration
The core in the XS1-L is connected to the switch by four internal links, and the
switch also allows connection to other chips via eight LLinks. The switch fully
connects its 12 links (four internal links and eight LLinks) and can support 12
XS1-L S
Figure 3 Example: configuring a pipeline of four pipelines of four XS1-L1s
YSTEM
0000
0001
0010
0011
00
00
Figure 2 Example: configuring a pipeline of four XS1-L1s
1
1
1
1
1
1
0
0
0
12:2
13:2
14:0
15:0
12:1
13:1
14:0
15:1
12:1
13:1
14:0
15:0
12:1
13:1
14:1
15:1
S
15:5
14:5
PECIFICATION
5
2
2
3
0
0100
0101
0110
0111
01
01
11
(0.9)
0
0
0
1
1
1
1
1
1
12:2
13:3
14:0
15:0
12:1
13:1
14:0
15:1
12:1
13:1
14:0
15:0
12:1
13:1
14:1
15:1
15:2
15:2
14:6
14:6
6
2
3
7
1000
1001
1010
1011
10
00
1
1
1
1
1
1
0
0
0
12:3
13:2
14:0
15:0
12:1
13:1
14:0
15:1
12:1
13:1
14:0
15:0
12:1
13:1
14:1
15:1
15:1
14:7
0
1
2
3
2
0
1100
1110
1101
1111
11
01
11
0
0
0
1
1
1
1
1
1
12:3
13:3
14:0
15:0
12:1
13:1
14:0
15:1
12:1
13:1
14:0
15:0
12:1
13:1
14:1
15:1
15:2
14:2
2008/08/25
17/40

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