XS1-L02A-QF124-I5 XMOS, XS1-L02A-QF124-I5 Datasheet - Page 19

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XS1-L02A-QF124-I5

Manufacturer Part Number
XS1-L02A-QF124-I5
Description
IC MPU 32BIT DUAL CORE 124QFN
Manufacturer
XMOS

Specifications of XS1-L02A-QF124-I5

Processor Type
XCore 32-Bit
Speed
500MHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
124-TFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
880-1031
XMOS
18/40
simultaneous message transfers.
The switch is configured by sending it configuration messages. These messages
request the switch to write data to, or read data from, a bank of 32-bit configura-
tion registers internal to the switch. These messages are used when booting to
set the node identifier of the switch, associate specific links with logical networks
and set the speed and width of the LLinks, and set the routing strategy. Sec-
tion
9.3
summarises the registers (and the fields within the registers) that must
be initialised in order to use the switch. The addresses used in the configuration
messages are the register numbers of the 32-bit registers in the switch.
XS1-L S
S
(0.9)
2008/08/25
YSTEM
PECIFICATION

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