XS1-L02A-QF124-I5 XMOS, XS1-L02A-QF124-I5 Datasheet - Page 28

• Manufacturer Part Number: XS1-L02A-QF124-I5
• Description: IC MPU 32BIT DUAL CORE 124QFN
• Manufacturer: XMOS

Specifications of XS1-L02A-QF124-I5

• Processor Type: XCore 32-Bit
• Speed: 500MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 124-TFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 880-1031

XMOS
During standby mode, buffered ports using clocks faster than 400 n MHz cease
to work properly. The table below gives some example values for the clock
divider, and lists the resulting frequencies for all clocks.
NOTE: If the clock frequency is dynamically adapted, all clock frequencies switch
between the top row and the chosen divider value, depending on the activity of
any threads.
In dynamic mode, the clock frequency is set to maximum on the fifth (to be con-
firmed) rising edge of the (slow) clock, and incurs a delay of 5
(to be confirmed). Wake-up on a timer is on the third (to be confirmed) rising
edge of the slow clock.
The switch can also be set to a lower clock speed, by sending a message to the
switch requesting a change to SSWITCH CLK DIVIDER. Changing the clock
speed of the switch affects the maximum speed at which data can be received
and the speed at which data is transmitted (because the symbol-intervals and
token-intervals that govern the transmission data-rate are measured in divided
clock-ticks).
XS1-L S
Divider
none
99
YSTEM
1
3
Processor
S
PECIFICATION
400
200
100
4
Thread
(0.9)
100
50
25
1
Port synchr
400
200
100
4
Port transfer
PLL CLK DIVIDER+1
100
50
25
1
400
Ref timer
2008/08/25
100
100
100
100
27/40
s