PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 56

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Figure 28
Timing Diagram for DMA-Transfer (fast) Receive (n = k
Figure 29
Timing Diagram for DMA-Transfers (slow) Receive (n = k
Figure 30
Timing Diagram for DMA-Transfers (slow or fast) Receive (n = 4, 8 or 16)
Generally it is the responsibility of the DMA-controller to perform the correct bus cycles
as long as a request line is active.
Semiconductor Group
DRQR
RD
CSS,
DACK
Cycle
DRQR
RD
CSS,
DACK
Cycle
DRQR
RD
CSS,
DACK
Cycle
n-2
n-2
n-1
n-2
n-1
56
n-1
n
n
32)
ITD05827
n
Functional Description
32)
ITD05828
ITD05829
PEB 20550
PEF 20550
01.96