PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 152

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

This register is only used in IOM-2 applications (active handshake protocol) in order to
identify active monitor channels when the "Search for active monitor channels"
command (CMDR:MFSO) has been executed.
SO
SAD5..0
CTB2..0
4.6.23 MF-Channel Active Indication Register (MFAIR)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: 00
Semiconductor Group
bit 7
0
Note that if a CFI time slot is selected as receive or transmit time slot of the
synchronous transfer, the 64-kBit/s bandwidth must be selected
(CT#2..CT#0 = 001).
CT#2
0
0
0
0
1
1
1
1
MF Channel Search On.
0…the search is completed.
1…the EPIC-1 is still busy looking for an active channel.
Subscriber Address 5..0; after an ISTA:MAC-interrupt these bits point to the
port and time slot where an active channel has been found. The coding is
identical to MFSAR:SAD5..SAD0.
SO
H
CT#1
0
0
1
1
0
0
1
1
SAD5
CT#0
0
1
0
1
0
1
0
1
SAD4
Bandwidth
not allowed
64 kBit/s
32 kBit/s
32 kBit/s
16 kBit/s
16 kBit/s
16 kBit/s
16 kBit/s
152
SAD3
read/write
read/write
Detailed Register Description
SAD2
–
bits 7..0
bits 3..0
bits 7..4
bits 1..0
bits 3..2
bits 5..4
bits 7..6
Transferred Bits
address: 0A
address: 14
SAD1
PEB 20550
PEF 20550
bit 0
H
H
SAD0
01.96