PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 401

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

9.2.2
Figure 146
Switching of PCM Time Slots to the CFI Interface (working sheet)
Semiconductor Group
MAAR
MAAR
CSCR
MAAR
MAAR
MAAR
MAAR
MAAR
MADR
MAAR
Writing 8 Bit CFI Idle Codes by the mP :
Reading back a previously written 8
Reading PCM Data switched to CFI:
Tristating a CFI Output TS:
CFI + PCM Mode 0
Switching of PCM Time Slots to the CFI Interface (data downstream)
CFI Port, TS
CFI Port, TS
CFI Port, TS
CFI Port, TS
PCM Port, TS
PCM Port, TS
CFI Port, TS
Switching of 8 Bit Channels:
Switching of Subchannels:
0 .
0
0
0 .
0 .
0 .
0 .
X
.
3
CFI Bit Position
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.
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CFI TS
2
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TS
1
Port
ELIC,
.
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.
Output
Disable
0
0 1
1 0
1 1
.
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R
0
EPIC
0
.
.
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.
.
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.
= 7 ... 4 or 7, 6 (default for D channel)
=
=
=
CFI Port
MADR
MAAR
R
3 ... 0 or 5, 4
7 ... 4 or 3, 2
3 ... 0 or 1, 0
...
...
...
...
MADR
MADR
MADR
MADR
MADR
Loop
PCM Mode 1
X .
Bit CFI Idle Codes by the mP :
Value of Idle Code (W)
Value of Idle Code (R)
Value (R)
.
.
.
.
.
PCM Port, TS
PCM Port, TS
1
0
.
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Loop
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TS
Port
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Data Memory
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401
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Direct
.
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.
CFI Mode 1
X
µP Access
.
MACR
MACR
MACR
MACR
MACR
MACR
MACR
.
.
Switching Command
Switching Command
Write Value to CM Data
Select
Read Value to CM Data
Read Data Memory:
Select µP Access
0 1 1 1 0 0 0 1
0
0
0 1 1 1 1 0 0 1
1 1 0 0 1 0 0 0
1 .
0 1 1 1 0 0 0 0
.
TS
0
0 0 1 1 =
0
0
0
0
0
1
1
PCM TS
.
.
.
.
For MADR/MAAR setings see loewr box
For MADR/MAAR setings see loewr box
For MAAR setings see lower box
µP Access
1
1
0
0
1
1
1
1
.
Port
.
0
0 1 =
0
1
1
1
1
1
.
.
0
0 0 1 0 =
0 1
0 1
0 1
0 1
1
1
0
1
0
0
.
. 0 0 0
=
=
=
=
=
MADR
MAAR
0
0
.
7 ... 0
7 ... 4
3 ... 0
7, 6
5, 4
3, 2
1, 0
CFI + PCM Mode 2
1
1 1 = 7, 6
1 0 =
0
0 0 =
0
.
X .
1
1
1
.
=
=
Desired
TS Width
and Bit
Position
7 ... 4
3 ... 0
5, 4
3, 2
1, 0
...
...
.
.
TS
Switched
TS Width
and PCM
Bit Position
.
PEB 20550
PEF 20550
.
Appendix
ITD08110
.
.
01.96