PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 319

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

interface, this channel can be configured as a P channel. This is achieved by writing
the code ‘1001’ to the CM code field. In this case the content of the corresponding CFI
timeslot is directly exchanged with the CM data field. Figure 109 and figure 110
5.6
If a CFI timeslot shall be accessed by the P instead of being switched to the PCM
illustrate the use of the Control Memory (CM) data and code fields for such applications.
If a CFI timeslot is initialized as P channel, the function taken on by the CM data field
can be compared to the function taken on by the Data Memory (DM) data field at the
PCM interface, i.e. it buffers the PCM data received or to be transmitted at the serial
interface. In contrast to the PCM interface, where PCM idle channels can be
programmed on a 2 bit sub-timeslot basis, the CFI only allows P access for full 8 bit
timeslots.
Figure 109
Semiconductor Group
P Access to the Downstream CFI Frame
MACR:
Down-
stream
0 1 0 0 1 0 0 0
P Channels
CFI
Frame
0
127
1
Code Field
0
0
1
Control Memory
MADR:
Data Field
319
MAAR:
0
MA6
.
Application Hints
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PEB 20550
PEF 20550
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ITD08089
. MA0
01.96