PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 281
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PEF20550HV21XT
Manufacturer Part Number
PEF20550HV21XT
Description
Manufacturer
Lantiq
Datasheet
1.PEF20550HV21XT.pdf
(407 pages)
Specifications of PEF20550HV21XT
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Considering a Bit Shift
A bit shift will also influence switching delays.
If the PCM frame is shifted relative to the frame signal, proceed as indicated below:
Shift only the PCM part of the figure (‘PCM line’ with the time slot numbers), relative to
the rest of the figure, to the left.
If the CFI frame is shifted relative to the framing signal, then the CFI part, including the
figure of the RCL, and all read and write cycle points are shifted left relative to the PCM
part. If CBSR:CDS = 000 or 001, then the frame CFI part is shifted to the right.
The figure so produced should be processed as previously described.
Note: If a bit shift has been installed while the PCM interface is already in the
5.4.4.3 Example: Switching of Wide Band ISDN Channels with the ELIC
The ELIC shall switch 6 B-channels of a digital subscriber to an 8 MBit/s PCM highway
guaranteeing frame integrity. The system uses the IOM-2 interface to adapt to a multiple
S-interface. No bit shift has to be applied. The tables below will help to determine the
combination of input/output ports and time slots, that meet the requirements.
Semiconductor Group
synchronous state, the following procedure has to be applied:
1.) Unsynchronize the PCM interface by writing an invalid number
2.) Resynchronize the PCM interface by writing the correct number to PBNR
to register PBNR
281
Application Hints
PEB 20550
PEF 20550
®
01.96
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