MPCBL0050N02Q Intel, MPCBL0050N02Q Datasheet - Page 32

• Manufacturer Part Number: MPCBL0050N02Q
• Manufacturer: Intel

Specifications of MPCBL0050N02Q

• Lead Free Status / RoHS Status: Supplier Unconfirmed

2.2.8.2
2.2.8.3
2.2.8.4
2.2.8.5
2.2.8.6
2.2.9
Note:
Intel NetStructure
Technical Product Specification
32
®
The entry block is able to turn off all of its devices when it receives a break signal from
baseboard temperature sensors located at thermally sensible locations (close to large
consumers of power such as main processors and DC-DC converters). This is
protection-independent of IPMI devices and is a last stage for avoiding board damage if
IPMI devices malfunction.
3.3V
This voltage is derived directly from 48V with single-stage conversion. Initially, it
supplies early power for management circuitry and the base interface controller. After
payload power is enabled, it also supplies other 3.3V domain devices.
1.5V
These voltages are derived directly from 48V with single-stage conversion. Voltage
1.5V is required for powering MCH, ICH, and FB-DIMMs.
1.8V
1.8V is derived from 3.3V using a standard buck converter and supplies FBDIMMs.
12V
This feed is used by the RTM, AMC, and others devices such as gate drivers. This supply
is derived from a dual stage converter.
CPU VRD
For efficiency, core voltages are obtained directly from 48V. Converters for both CPUs
are identical.
Voltages for processors depend on a digital word provided to special control logic which
is able to tune it across the whole range of the VRM11 specification. Circuitry includes
D/A converter to translate a VID word into the desired voltage, overcurrent protection,
characteristic modeling, and logic circuit for enabling.
Autonomous Emergency Power-down Circuitry
To help protect the system from disaster, a number of thermal sensors are placed on
the board. These sensors measure temperature in the most thermally stressed points
on the board. In case of an uncontrolled temperature rise, the main power to the board
will be cut off. The sensors used by this feature are not monitored by IPMC.
During normal board operation, it is IPMC’s responsibility to monitor onboard
temperature and inform the Shelf Manager by logging SEL events. Autonomous power-
down is last-resort protection intended to save the board in the event of IPMC or Shelf
Manager failure.
• Hot Swap devices comply to with the PCIMG 3.0 requirements
• 80 VDC charging current for holdup storage capacitors to meet the holdup
• Alarms for A/B feed loss and fuse failure through isolated outputs to IPMI
• Overtemperature protection
MPCBL0050 Single Board Computer
requirement in the PICMG 3.0 spec
MPCBL0050—Feature Overview
Order Number: 318146-001
September 2007