MPCBL0050N02Q Intel, MPCBL0050N02Q Datasheet - Page 15

• Manufacturer Part Number: MPCBL0050N02Q
• Manufacturer: Intel

Specifications of MPCBL0050N02Q

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Introduction—MPCBL0050
Table 1.
September 2007
Order Number: 318146-001
Acronyms and terms (Sheet 2 of 2)
IDE
IPMB
IPMC
IPMI
KCS
logic ground
LPC Bus
MCH
MPCBL0050
MPRTM0040
MPRTM0050
MT/s
MTBF
NEBS
NMI
Node Board
Node Slot
Physical Port
POST
ROM
RTM
SBC
SEL
shelf ground
SMBus
SMI
SMS
SOL
USB
Term
Integrated Device Electronics. A common, low-cost disk interface.
Intelligent Platform Management Bus. A physical two-wire medium to carry IPMI
information.
Intelligent Platform Management Controller. A microcontroller on the baseboard responsible
for low-level system management. Also referred to as BMC.
Intelligent Platform Management Interface. A programming model for system
management.
Keyboard Controller Style interface
A digital ground is also known as a logic ground.
Low Pin Count Bus. A legacy I/O bus that replaces ISA and X-bus. Refer to the Low Pin
Count (LPC) Interface Specification.
Memory Controller Hub
A high-performance single board computer with an AdvancedMC slot.
A Rear Transition Module (RTM) that can be used with the MPCBL0050.
A Rear Transition Module (RTM) that can be used with the MPCBL0050. In addition to
MPRTM0040 functionality, the MPRTM0050 provides Fibre Channel capability and rear
access for MPCBL0050 Gigabit Ethernet ports.
MegaTransfers per second - front side bus is quad pumped i.e. at one clock cycle 8 bytes
are transferred, for 266MHz clock it results in 1066MT/s FSB.
Mean Time Between Failure. A reliability measure based on the probability of failure.
Network Equipment Building System. A set of telco standards for equipment emissions,
thermal, shock, contaminants, and fire suppression requirements.
Non-Maskable Interrupt. A low-level PC interrupt.
A board capable of providing and/or receiving packet data to/ from a Fabric Board via the
ports of the networks. The term is used interchangeably with SBC in this document.
A slot supporting port connections to/from one or more Fabric slots. A Node slot is intended
to accept a Node Board.
A port that physically exists. It is supported by one of many physical (PHY) type
components.
Power On Self Test
Read-Only Memory
Rear Transition Module. This term is used interchangeably with MPRTM0050 in this
document.
Single Board Computer. This term is used interchangeably with Node Board and MPCBL0050
in this document.
System Event Log. Actions logged by the management controller.
A chassis ground is also known as a shelf ground.
System Management Bus. Similar to I2C.
System Management Interrupt. A low-level PC interrupt which can be initiated by the
chipset or management controller. Used to service IPMC or handle things like memory
errors.
System Management Software or Standard Microsystems Corporation*
Serial Over LAN
Universal Serial Bus. A general-purpose peripheral interconnect. USB 1.1 operates up to 12
Mbps. USB 2.0 operates up to 480 Mbps.
Intel NetStructure
Definition
®
MPCBL0050 Single Board Computer
Technical Product Specification
15