MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 881

• Manufacturer Part Number: MC9S12XDP512MAG
• Manufacturer: Freescale

Specifications of MC9S12XDP512MAG

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(24-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

22.4.1.8
If the pin is used as an interrupt input this register serves as a mask to the interrupt flag to enable/disable
the interrupt.
22.4.1.9
If the pin is used as an interrupt input this register holds the interrupt flag after a valid pin event.
22.4.1.10 Module Routing Register
This register supports the re-routing of the CAN0, CAN4, SPI0, SPI1, and SPI2 pins to alternative ports.
This allows a software re-configuration of the pinouts of the different package options with respect to
above peripherals.
22.4.2
22.4.2.1
The BKGD pin is associated with the S12X_BDM and S12X_EBI modules. During reset, the BKGD pin
is used as MODC input.
22.4.2.2
Port A pins PA[7:0] and Port B pins PB[7:0] can be used for either general-purpose I/O, or, in 144-pin
packages, also with the external bus interface. In this case port A and port B are associated with the
external address bus outputs ADDR15–ADDR8 and ADDR7–ADDR0, respectively. PB0 is the ADDR0
or UDS output.
Freescale Semiconductor
of Modules
Number
Ports
Interrupt Enable Register
Interrupt Flag Register
BKGD Pin
Port A and B
5
4
3
2
1
The purpose of the module routing register is to provide maximum
flexibility for derivatives with a lower number of MSCAN and SPI modules.
CAN0
Table 22-68. Module Implementations on Derivatives
yes
yes
yes
yes
yes
CAN1
MC9S12XDP512 Data Sheet, Rev. 2.21
yes
yes
yes
—
—
MSCAN Modules
CAN2
yes
yes
—
—
—
NOTE
CAN3
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
yes
—
—
—
—
CAN4
yes
yes
yes
yes
—
SPI0
yes
yes
yes
—
—
SPI Modules
SPI1
yes
yes
—
—
—
SPI2
yes
—
—
—
—
883