MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 880

MC9S12XDP512MAG

Manufacturer Part Number
MC9S12XDP512MAG
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512MAG

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(24-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.4.1.2
This is a read-only register and always returns the buffered state of the pin
22.4.1.3
This register defines whether the pin is used as an input or an output.
If a peripheral module controls the pin the contents of the data direction register is ignored
22.4.1.4
If the pin is used as an output this register allows the configuration of the drive strength.
22.4.1.5
This register turns on a pull-up or pull-down device. It becomes active only if the pin is used as an input
or as a wired-OR output.
22.4.1.6
This register selects either a pull-up or pull-down device if enabled. It becomes active only if the pin is
used as an input. A pull-up device can be activated if the pin is used as a wired-OR output. If the pin is
used as an interrupt input this register selects the active interrupt edge.
22.4.1.7
If the pin is used as an output this register turns off the active high drive. This allows wired-OR type
connections of outputs.
882
Input Register
Data Direction Register
Reduced Drive Register
Pull Device Enable Register
Polarity Select Register
Wired-OR Mode Register
Figure 22-76. Illustration of I/O Pin Functionality
Module
DDR
PTI
PT
MC9S12XDP512 Data Sheet, Rev. 2.21
module enable
data out
output enable
0
1
0
1
0
1
PIN
(Figure
22-76).
Freescale Semiconductor
(Figure
22-76).

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