MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 1301

• Manufacturer Part Number: MC9S12XDP512MAG
• Manufacturer: Freescale

Specifications of MC9S12XDP512MAG

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(24-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

E.3
1. XGATE read access to Flash not possible on DG128/D128/A128/B128 and D64
2. Program Pages available on DT384 are $E0 - $E7 and $F0 - $FF
3. Program Pages available on B256/A256/DQ256/DT256/D256 are $E0 - $E7 and $F8 - $FF
4. Shared XGATE/CPU area on A512/DP512/DT512/DT384 at global address $78_0800 to $78_7FFF (30Kbyte)
5. Shared XGATE/CPU area on A256/B256/DT256/DQ256/D256 at global address $78_0800 to $78_7FFF (30Kbyte)
Freescale Semiconductor
MC9S12XD-Family Flash Configuration
Global Addres
$78_0000 (PPAGE $E0)
$7A_0000 (PPAGE $E8)
$7C_0000 (PPAGE $F0
$7E_0000 (PPAGE $F8)
Shared XGATE/CPU area
Not implemented
s
Figure E-1. MC9S12XD Family Flash Configuration
)
DP512
MC9S12XDP512 Data Sheet, Rev. 2.21
A512
128k
128k
128k
128k
DT384
128k
128k
128k
A/B256
DQ256
128k
128k
1 2 3 4 5
A/B128
DG128
128k
Appendix E Derivative Differences
D64
64k
1303